Computing systems often are required to provide a sustained level of performance over a relatively short period of time, rather than merely relying on bursty behavior. This requirement is particularly acute for real time systems with sensor feedback loops that can become unstable if the processing of sensor signals is delayed. In addition, embedded computing systems are often very cost sensitive, and thus have peripherals with very little processing power or buffering. Many peripherals compete for the limited resources of a central processor through high priority interrupt driven requests. Such interrupts may also occur at atypically high rates due to common faults, such as broken contacts or wires, presenting safety issues in the context of automotive systems.
High frequency interrupts have typically been managed with in-line systems, between the peripherals and processor, that delay or block excessive interrupt activity. These systems often rely on estimates of allowable interrupt rates, which inadequately accounts for all but the most common operating scenarios. Furthermore, typical interrupt handling does not include the ability for different applications to tolerate different interrupt overload scenarios.